RE: [SI-LIST] : A Question About Power Noise.

Zhang, Michael T (michael.t.zhang@intel.com)
Wed, 17 Mar 1999 15:28:39 -0800

The first implementation approach is actually one of the PCB rule at HP (at
least in their printer division), mostly for EMI reason - high-frequency
current will be supplied by the local decoupling cap and the ground plane is
not contaminated, which equates less ground bounce.

A different way to look at this is to find out which intended current path
has smaller loop area. All self and mutual inductance acts together in the
form of loop inductance.

-Michael T. Zhang
Platform Architecture Lab (PAL), Intel Corp
(503) 264-2301

-----Original Message-----
From: Doug Brooks [mailto:doug@eskimo.com]
Sent: Wednesday, March 17, 1999 2:40 PM
To: Ray Anderson; si-list@silab.eng.sun.com
Subject: Re: [SI-LIST] : A Question About Power Noise.

OK Ray. Here is a loaded question for you. (See below)

> We've found that the MOUNTED inductance of a capacitor is composed
> mainly of three components:
>
> Capacitor Inductance (a function of capacitor size [primarily
height] )
> Pad and Via Inductance (a function of pad geometry and via length)
> PCB Spreading inductance (a function of board stackup and location
on board)
>
> Typically (and this can vary depending the exact situation) these
partial
> inductances are about:
>
> Capacitor Inductance ~ 200pH - 400pH ( approx.300pH for
a typical
0603 part)
>
> Pad and Via Inductance ~ 1 to 5 nH (depending on whether
they are
designed
> intelligently or not)
>
> PCB Spreading inductance ~ 20pH to 500 pH (depending on
stackup and
location)

There has been considerable discussion about how to mount/route a bypass
cap. One theory is to run traces from the cap to the device and then vias
from the cap to the plane. The other theory is to run vias to the plane
from both the device and the bypass cap and let the currents flow over the
'low inductance' plane.

Now, if the highest inductance part of the path is the pad/via, would that
favor running (wide) traces from the cap directly to the device, since that
eliminates two vias between the cap and the device? A wide, short path only
has a few nH inductance (I think).

Doug Brooks

.
****************************************************
Doug Brooks, President doug@eskimo.com
UltraCAD Design, Inc. http://www.ultracad.com

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