Re: [SI-LIST] : BGA vs Leaded - summary

greg kimball ([email protected])
Tue, 09 Mar 1999 23:52:05 -0800

[email protected] wrote:
>
> Here is a summary from a slightly different view:
>
> BGAs have a lot of advantages, and accompanying disadvantages ---
>
> a BGA gives considerable flexibility in design and pinout, compared
> to a leaded packge.
>
> a BGA generally gives smaller overall size for the same number of
> connections -- if your PWB technology (=$$) can support it
>
> a BGA cannot have bent leads, so assembly yields usually go up
>
> Electrical stuff:
>
> Most low-cost BGAs have bondwires. Bondwires are not necessarily
> bad. If you put the return paths adjacent to the signals, it
> can be well controlled. If you are clever, bondwires can also
> be quite short, like 1 mm.
>
> Most low-cost BGAs do not have internal planes. Be sure that you
> need them... if the trace is only 1 or 2 mm long, is the plane really
> doing anything for its characteristics? You might want the planes
> to distribute power, though.
>
> Most low-cost BGAs have electro-plated gold. This means that they
> have plating stubs on every signal. Inner-row signals have longer
> stubs than outer-row signals. This is important to include in
> any electrical analysis.
>
> Flip-chip is good, but not low-cost. Remember also that flip-chip
> replaces the bondwires with trace, so the total path length is about
> the same. Generally, anything that you can do to reduce the path
> length reduces your SI concerns.
>
> A disadvantage of the flexibility of BGAs is that it is difficult
> to generalize about their electical performance. Performance is
> really determined by the specific design.
>
> We do a lot of BGAs at ST, you may notice that our focus is
> on low cost!
>
> Maybe the moral of the story is that you should talk to your package
> supplier/designer a lot, and figure out how to use BGA's
> flexibility to your advantage. Low cost, high performance, and
> small size could all happen at the same time, but only if you
> work at it!
>
> Rich
>
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Rich,
Sounds like you shy away from flip chip - primariliy from cost aspect,
or dont see enough advantage over leaded FP? Yes, you have to route out
thru the bumps eventually,so lead length is only slightly shorter since
you dont have to path up to the post then down thru the leads. Power
dissipation capabiltiy is probably reduced depending on # of heat
conducting bumps and underfill. IBM, of course, pioneered flip chip, and
has done an enormous R/D effort and infrastructure to support it, but
they dont use it in their low-cost products. Space requirements are
significantly reduced, so pkg density and profile height is probably a
big factor in its use.
Good summary,
Thanks,
Greg

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