TI's webpage http://www.ti.com/sc/docs/psheets/pids1.htm has information
on two SSTL bus drivers and one SSTL buffer under the
category MEMORY DRIVERS AND TRANSCEIVERS (SSTL) (4) . TI also has a short
blurbs about SSTL at:
The si-list archive at http://www.qsl.net/wb6tpu/si-list/ has three
posts under the topic "What is SSTL?"
"SSTL, (Series Stub Terminated Logic), is a device created by the JEDEC
committee as a standard device for memory modules. It is intended to be an
upgrade for LVTTL logic. The recommended end termination is 25 to 50 ohms.
You can get the latest SSTL specification from the JEDEC committee or
Global. Most current applications for SSTL are in fact for driving DRAMs
and SRAMs, as John Fitzpatrick pointed out. See the Samsung 64M DRAM '96
Texas Instruments has a 74SSTL16837, 20 bit bus driver, LSI Logic provides
SSTL buffers for their G10 ASICs.
The SSTL has a differential receiver, Vih and Vil are Vref + 200mV and Vref
- 200mV, respectively.
Has anyone out there used SSTL to drive signals on a backplane bus, or can
you point any advantages of using SSTL over GTL for backplane applications?
Does a 25 ohm resistor placed next to the backplane connector truly
isolate the receiving stub, to prevent bus ringing?
"From reading between lines of datasheets, my guess is that
the basics of SSTL are:
- standard push-pull CMOS outputs
- input threshold defined by an external voltage reference
(divided down Vsupply)
Because the input thresholds are tighter than TTL, it is possible
to use a combination of series and parallel terminations to
guarantee incident wave switching.
The main application appears to be memory modules. The proponents
of SSTL would have a 25ohm resistor close to the module connector
to mask the effect of the module stub.
John" (John Fitzpatrick)
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