Re: [SI-LIST] : On chip decoupling

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From: Wang Xiao-yun (wangxiaoyun@iname.com)
Date: Sun May 27 2001 - 18:00:33 PDT


Gurus:
   Maybe a stupid question.
   What is normally we see on the package of PIII or Athlon processors?
Are the 0603(or other sizes) parts also on-chip capacitors or could we term
the subject under this thread 'on-die capacitor'?
   My next question is what is the main (dis)advantage of these on-package
parts? I think it is easy for them to reach the capacity as ones mounted on
the PCB, say, 100pF - 1uF, but they are certainly less efficient than those
embedded in the die, am I right?
   My last question is what special technique is needed to mount these parts
on the chip?
   Thanks in advance for any comments.

At 17:33 01-5-25 -0700, Lynne Green wrote:
>Wherever power/ground run in "parallel", (over the IO or
>in the core), you can use whatever layers are not used
>for routing for caps (such as M2=P,M3=G,M4=P,M5=G).
>Interleaved metal can provide a lot of capacitance when
>the oxides are thin.
>
>Some designers put similar structures in the core region
>(on P1/P2/M1/M2) where empty space occurs (unused
>cell space).
>
>- Lynne
>
>
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Wang Xiao-yun
Shanghai, China
善守者藏于九地之下, 善攻者动于九天之上, 故能自保而全胜也.

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