Re: [SI-LIST] : MECL System Design Handbook

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From: bmartin (brian.martin@cern.ch)
Date: Tue May 22 2001 - 03:16:42 PDT


Steve asked about the infamous MECL figure 7-17 and these two sources may be of interest.
There is a paper from Agilent, Application Note 1304-1, available at
http://literature.agilent.com/litweb/pdf/5968-0007E.pdf
that doesn't acknowledge the MECL handbook but even a brief reading reveals that the book's tests
and track dimensions, not to mention some of its wording, have been a major source of inspiration.
I was wondering how much else had been inspired since both sources cite the use of Norplex G10 with
an Er of 5.3 That sounded a bit high to me so I checked out
http://www.ilnorplex.com/PDF%20Files/G10.pdf which tells me that the permittivity of G10 is 4.8.
Either way you won't get a pure 50 ohms out of it, my web freebie calculator tells me its either
50.9 or 52.9 ohms for the chosen dimensions and the two values of Er, and that's before you throw in
the manufacturing tolerances.
Nit-picking aside, the scope traces on the Agilent paper are clearly not vintage '80 (my 3'rd
edition of the MECL handbook in case you were wondering what vintage I am) although how all but two
of the traces were captured on October 13th at 11:47 is a bit of a mystery that might have more to
do with photo editors than the lab. The results however appear consistent with the original MECL
work.
At the other end of the scale we have the 1998 paper http://www.ultracad.com/90deg.pdf which clearly
demonstrates that for
tracks one tenth the width of the MECL tests, and hence more relevant to current designs, there
were no longer any measureable effects.
And now for the arm waving bit. I would agree with Steve that it is important to appreciate the
weighting of the relevant effects on your system. In my experience the major cause of signal
degradation at high speeds has more to do with silicon design, chip packaging, decoupling and the
connector than the pcb the chip lives on. However when you operate in such an environment you have
to go the extra mile to ensure that nothing on the board could be blamed for making the situation
worse, if for no other reason than wanting to avoid the painful (read expensive) post-mortem loop.
Knowing that undesirable effects are reduced by smooth routing and reduced geometry has to be
translated pragmatically.If you can't avoid a right angle because of routing density then so be it.
At that density this is probably the least of your worries. If using right angles would avoid the
need for a via then go for it. Given the opportunity however, 45 degree bends and 'arcs' offer you
both shorter paths and convincing evidence that whatever the problem is, it's probably not here.
Brian

Steve Corey wrote:

> Mike -- I agree -- if someone is able to reproduce the results shown in
> Fig. 7-17 of the MECL handbook, it probably won't stop anyone's design from
> going to fab. I would postulate two reasons why it would be helpful to
> answer the original question, though, or at least why I am interested in
> finding out the answer.
>
> The first is the technical credibility of the MECL handbook and its
> author. If it turned out he drylabbed his TDR measurements, his entire
> work gets called into question, not to mention his technical reputation.
>
> The second is that size and frequency tend to offset each other, so that an
> effect which is important in a large, low-frequency regime often maintains
> its importance in a small, high-frequency regime. This is particularly
> true in low-loss situations.
>
> A possible third reason is that it gives some list members the opportunity
> to reminisce about the days of black-tape PCB layout... :)
>
> Now for my unsolicited personal opinion about the importance of right-angle
> bends in today's typical digital circuit... Assuming the MECL handbook
> results are accurate, you won't get enough reflection to matter. The TDR
> example in the handbook shows 5% reflection for a 100-mil trace at 30ps
> risetime. Since the size of the anomaly becomes smaller with decreasing
> trace width, causing its electrical length on a TDR plot to become shorter,
> it would end up becoming unobservable for a certain trace width at 30ps.
> This is particularly true when skin and dielectric losses are mixed in,
> since they fuzz the effects of discontinuities. (Radiation may be an
> issue, but I don't consider myself qualified to guess at it. People have
> also mentioned skew introduced by the bends. Furthermore, there are
> obviously other non-TEM effects caused by the sharp corners.)
>
> If the above drylab hand-waving on my part is correct, then the results
> shown in the MECL handbook serve to underscore, rather than undercut, what
> the various experts have stated in their seminars, and what several
> well-informed people on this list have stated to be their understanding.
> In other words, it's possible that everyone is right... If engineers have
> been unnecessarily concerned, based on the MECL handbook, about right-angle
> bends in their designs, I think it stems from misinterpretation of the
> experimental results, rather than blatant inaccuracy of the results. My
> primary complaint about the figure is that it would appear, from looking at
> the TDR signature, that the relative distances between the four
> discontinuities are inaccurate in the drawing.
>
> Ideally, some philanthropic individual would do a careful, thorough
> investigation as to where and when right angles do and don't matter,
> complete with both measurements and field solutions, and publish it. Since
> this probably won't happen any time soon, the only way to know for sure is
> to put a good TDR probe to your trace and see what comes back (of course,
> filtering the results to your risetime of interest).
>
> -- Steve
>
> -------------------------------------------
> Steven D. Corey, Ph.D.
> Time Domain Analysis Systems, Inc.
> "The Interconnect Modeling Company."
> http://www.tdasystems.com
>
> email: steve@tdasystems.com
> phone: (503) 246-2272
> fax: (503) 246-2282
> -------------------------------------------
>
> "Degerstrom, Michael J." wrote:
>
> > Of course when they were using .1" wide traces back in the 70's
> > they didn't have sub-100 ps edges to worry about. I can't see
> > the relevance to the sharp corner effect to signal integrity
> > concerns for any commercial applications for a couple of decades
> > after that work was introduced. Maybe some of us will need to
> > be concerned about corner effects now or in the near future.
> > Also, my perceptions is that RF designers have to deal with the
> > corner effects for their type of work. BTW, I think the handbook
> > was and still is to some degree one of the best SI resources
> > available.
> >
> > Mike
> >
> > > -----Original Message-----
> > > From: Ken Cantrell [mailto:Ken.Cantrell@srccomp.com]
> > > Sent: Monday, May 21, 2001 9:37 AM
> > > To: Ingraham, Andrew; si-list@silab.eng.sun.com
> > > Subject: RE: [SI-LIST] : MECL System Design Handbook
> > >
> > >
> > > That was during the westward migration in covered wagons wasn't it?
> > >
> > > -----Original Message-----
> > > From: owner-si-list@silab.eng.sun.com
> > > [mailto:owner-si-list@silab.eng.sun.com]On Behalf Of Ingraham, Andrew
> > > Sent: Friday, May 18, 2001 8:53 PM
> > > To: si-list@silab.eng.sun.com
> > > Subject: RE: [SI-LIST] : MECL System Design Handbook
> > >
> > >
> > > > (Don't forget, the revision date on the hanbook, or at
> > > least on the PDF
> > > > I downloaded, is 1988.) ...
> > >
> > > My hardcopy version of the handbook (which I can't find right
> > > now) is older
> > > than that.
> > >
> > > Some of the research work is probably from the 1970's. Many
> > > ECL boards back
> > > then were simple double-sided (2-layer) with ground plane on
> > > one side and
> > > signals on the other, hand routed using sticky black tape for
> > > the traces.
> > >
> > >
> > >
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