RE: [SI-LIST] : Accuracy

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From: Hansel A Collins (hacc@ix.netcom.com)
Date: Mon May 21 2001 - 23:50:05 PDT


Hello Todd,

I think that your base assumption on accuracy as you have outlined it is the
correct one. If a single component in your timing path has a variation of
some
250ps, spending a lot of time to refine the analysis of another timing
component
that can at best buy you only 25ps IS a wasted effort. No amount of
argument that can justify that level of effort. As far as any SI work is
concerned once you have demonstrated that there are no surprises left in a
path under investigation the work should focus on that component that still
has a 250ps variance.

In general the application provides the guidance on whether timing variances
such
as 25ps is significant enough to spend the effort refining the analysis. At
1.25GHz
I will be working very hard the refine my analysis and 50MHz I would not
spend the
time at this point.

hansel

Hansel A Collins
CTO Chief Scientist
TriCN Associates, LLC
P.O. Box 789
Mountain View, CA 94041-789

Ph: 650 988 6927
Fx: 650 988 6927
Ce: 650 867 4306

www.tricn.com

-----Original Message-----
From: owner-si-list@silab.eng.sun.com
[mailto:owner-si-list@silab.eng.sun.com]On Behalf Of Todd Westerhoff
Sent: Monday, May 21, 2001 7:37 AM
To: si-list@silab.eng.sun.com
Subject: [SI-LIST] : Accuracy

Here's a question for the group that I'm hoping will invoke some discussion:

I've seen and heard lots of comments over the years about the need for
"accurate" SI analysis. We've had any number of threads over the past few
months discussing effects that would produce variances of 50 pS or less in
simulation results, and the need for such levels of accuracy.

But what about timing? After all, signal integrity is only one component of
system analysis; you need to put SI analyses together with component timing
data to figure out whether your system works or not. And what's the point
of having 15 pS of accuracy in your SI analysis results if you only know
component timing to within 250 pS?

I'm interested in how people are coupling SI analysis with timing data, for
both common-clock and clock-forwarded architectures, to close system-level
timing. I'm really interested in what level of accuracy people have for
timing data, and at what level. At the commercial component level, it seems
to me there's so much margin in the timing numbers that many of the finer
effects we discuss here are swamped out. And even when you have internal
timing data for an ASIC you're designing, well, it seems to me that if you
know your timing and skews to within 25 pS, you're doing better than most.

Comments, please.

Todd.

Todd Westerhoff
SI Engineer
Hammerhead Networks
5 Federal Street
Billerica, MA 01821
twester@hhnetwk.com
ph: 978-671-5084

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