Re: [SI-LIST] : Spread Spectrum in High Speed Serial Design

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From: Ravinder Ajmani (ajmani@us.ibm.com)
Date: Mon May 21 2001 - 11:07:25 PDT


I will mention two applications. First was a 400 Mbits/sec serial
application where I tried to use spread spectrum clock. The result was
multiple link errors. I then decided to stay with the conventional clock.
Second was a 1.0625 GBits/sec Fibre-channel application, where a
conventional clock with not so good stability resulted in poor eye
diagrams, when measured on an HP Communication Analyzer with built-in clock
recovery unit. The eye diagram looked perfect on my 1.5 GHz real time
oscilloscope, as well as on a TEK 11801C sampling scope. After much
research, we found out that the clock instability was too much to be
tracked correctly by the clock recovery unit.
The lesson learnt is that for serial communication one should stick with
the clock with good stability.

Regards, Ravinder
PCB Development and Design Department
IBM Corporation
Email: ajmani@us.ibm.com
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x Ye <x_ye_2001@usa.net>@silab.eng.sun.com on 05/21/2001 10:11:06 AM

Please respond to x Ye <x_ye_2001@usa.net>

Sent by: owner-si-list@silab.eng.sun.com

To: si-list@silab.eng.sun.com
cc:
Subject: [SI-LIST] : Spread Spectrum in High Speed Serial Design

Hi all,

I have a question about using SSC (Spread Spectrum Clock) in High Speed
serial
design. There has been concerns that if the transceiver and the receiver
use
different clocks (and both are SSC), the receiver may have difficulty to
track
the bit drift due to the timing difference (which is somewhat 1 bit drift
every 200 bits for a 0.5% down-spread). Anybody has the experience or any
comment?

Thanks,

XY

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