From: Gerald Johnson ([email protected])
Date: Mon May 21 2001 - 09:11:35 PDT
I'm not sure when the handbook first came out, but my
earliest copy is a Second Edition, dated December, 1972.
Since MECL I was released in 1962, I'd guess that the first
edition had to be between 1962 and 1972. During that ten
year period, the technology had moved from MECL I, to MECL
II, to MECL III and finally MECL 10,000 (10K). Transition
times for the families in the same order went from
8 ns, to 4 ns, to 1 ns, then back up to 3.5 ns for the 10K.
The slowdown was to make it easier to use for people who
were still struggling with this new concept of transmission
lines and terminations. Remember, at that time people
were used to very slow TTL (and even RTL, DTL, etc.),
so the radical new concept of "terminations" was quite a
big lump to swallow.
Of course, after people learned how, then the 100K and
ECLinPS family (E, EL then EP) came out and were successful.
In the days of MECL 10K, everyone knew that ECL was for speed,
TTL was for general use, and CMOS was for very low speed and
very low power use, it would never be fast or high power.
Just goes to show that as usual, when people predict the
future they're almost always wrong. Today CMOS parts are faster
than the early ECL could even approach, and predictions are that
the newest microprocessors could require over 200 Amps in a
year or two.
Senior Staff Engineer
>> (Don't forget, the revision date on the hanbook, or at least
>> on the PDF I downloaded, is 1988.) ...
> My hardcopy version of the handbook (which I can't find right
> now) is older
> than that.
> Some of the research work is probably from the 1970's. Many
> ECL boards back
> then were simple double-sided (2-layer) with ground plane on
> one side and
> signals on the other, hand routed using sticky black tape for
> the traces.
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