RE: [SI-LIST] : specctraquest waveform sims fail with design link and buffer delays on the fly......

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From: Todd Westerhoff (twester@hhnetwk.com)
Date: Wed May 09 2001 - 13:33:21 PDT


I'd check the test load conditions specified in the driver buffer model to
make sure nothing wacky is going on. If you've got standard load conditions
that would cause a simulation to fail, it would explain why on-the-fly
simulations fail (as they build a separate circuit to measure the buffer
delay), while library simulations would succeed.

My $0.02.

Todd.
Todd Westerhoff
SI Engineer
Hammerhead Networks
5 Federal Street
Billerica, MA 01821
twester@hhnetwk.com
ph: 978-671-5084

  -----Original Message-----
  From: owner-si-list@silab.eng.sun.com
[mailto:owner-si-list@silab.eng.sun.com]On Behalf Of Greim, Michael
  Sent: Wednesday, May 09, 2001 3:32 PM
  To: si-list@silab.eng.sun.com
  Cc: Greim, Michael
  Subject: [SI-LIST] : specctraquest waveform sims fail with design link and
buffer delays on the fly......

  Hi All,

  I am seeing something odd in specctraquest 13.6 and wanted to
  solicit your opinion to see if this is a feature of the tool or
  perhaps something else is going on. Simply put, any time
  that I try a waveform simulation that includes a design link
  and calculates buffer delays on the fly, the simulation fails
  at all three speeds. If I run the sim using delays from the library,
  the simulation passes and when I calculate buffer delays in
  the model editor that passes as well. In both cases I am in
  clined to believe the results.

  Any thoughts?

  Best Regards,

  Michael C. Greim Sonus Networks
  mgreim@sonusnet.com 978-589-8336

  Making the world safe for digital signals everywhere

  And all this science I don't understand
  It's just my job six days a week

  The time is gone. The email's over
  Thought I'd something more to say......

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