RE: [SI-LIST] : RE: Power planes

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From: Doug Hopperstad (doug.hopperstad@qlogic.com)
Date: Tue May 01 2001 - 11:11:23 PDT


Matthew,
Thanks for the response. With regard to your comments:
1. I am using high-frequency components and would like to keep the routing
contained between two ground planes.

2. The impedance on the outer layer is not a major factor. I am doing very
little routing on those layers. To keep EMI and other factors down, I am
using the dual-striplines to complete the majority of the routing.

3. I am using 4 mil between the power/ground layers (see the chart below).
The board vendor has indicated a cost increase by have less than 4 mils
between layers for manufacturing yeild results. By containing the routing
between the grounds and having power and grounds adjacent, I am able to get
good results.

Doug Hopperstad

-----Original Message-----
From: Matthew Humphreys [mailto:humps@sgi.com]
Sent: Tuesday, May 01, 2001 1:04 PM
To: 'Doug Hopperstad'; si-list@silab.eng.sun.com
Subject: RE: [SI-LIST] : RE: Power planes

Hi Doug,

First, a quick comment.
I would suggest moving layer 15 so that it is adjacent to a gnd plane.
Maybe put it at layer 10, and shift layers 10-14 down.

The major concern (that I can think of, I don't have experience here) with
going from 2oz to 0.5oz is going to be impedance. If the impedance is the
same between the layers, then I don't see much of a problem. I don't know
if you've already done this, but I would suggest using a 2D field solver to
calculate your trace widths and dielectric thickness' so that the impedance
is the same from layer to layer.

The less dielectric material between pwr and gnd's, the better. I would
suggest lowering it to at least 4 mils. I've read that some people have
used 3 mils with success, but I personally haven't.

I'm looking forward to suggestions reguarding how you should handle the
split power plane. I'm currently having problems with a design that has a
split power plane. I didn't surround it with two gnd planes and I'm
wondering if that is what is giving me the problem.

Matt

-----Original Message-----
From: Doug Hopperstad [mailto:doug.hopperstad@qlogic.com]
Sent: Tuesday, May 01, 2001 9:34 AM
To: si-list@silab.eng.sun.com
Subject: [SI-LIST] : RE: Power planes

I am currently looking at the following stackup for a design and would like
some feedback:

1. ---- ---- Top layer (Very little routing) (2 oz)
2. --------- Ground (1 oz)
3. --------- Split Power (1 oz)
4. --------- Ground (0.5 oz)
5. ---- ---- Routing (0.5 oz)
6. ---- ---- Routing (0.5 oz)
7. --------- Ground (0.5 oz)
8. ---- ---- Routing (0.5 oz)
9. ---- ---- Routing (0.5 oz)
10. --------- Ground (0.5 oz)
11. ---- ---- Routing (0.5 oz)
12. ---- ---- Routing (0.5 oz)
13. --------- Ground (0.5 oz)
14. --------- Power - 3.3v (1 oz)
15. --------- Power - 2.5v (1 oz)
16. ---- ---- Bottom layer (Very little routing) (2 oz)

The dual-striplines are separated by grounds and the power-to-grounds are
adjacent to each other for high frequency noise coupling. The board will be
made from Getek with Er = 3.9 with a total thickness of 125 mils.

Dielectric spacing between layers:
1:2, 15:16 = 14 mils
2:3, 14:15 = 6 mils
3:4, 4:5, 6:7, 9:10, 10:11, 12:13, 13:14 = 4 mils
5:6, 8:9, 11:12 = 12 mils

Layers 14 and 15 are going to be dedicated power planes, each for a single
voltage source (2.5v and 3.3v). The split plane will have 1.35v, 1.8v and
5v.

1. Is there any concerns with making the outer layers 1 or 2 ounce compared
to the inner layers set at 0.5 ounce?
2. Put the split power plane between two grounds planes?
3. How much of a dielectric spacing would be best between two adjacent power
planes?

I am open to using layer 2 as a power plane instead of a ground. I look
forward to any comments on this issue, thanks.

Doug Hopperstad

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