Re: [SI-LIST] : Clock Jitter

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From: Saeen Malik (saeens@hotmail.com)
Date: Wed Apr 25 2001 - 09:55:03 PDT


Hi Scott,

You mentioned that "Hold requires jitter to be included in calculation"
in case of Source Synchronous Interface. I don't quite understand it.
Every manufacturer would give you a setup and hold time number
for clock and data on a source synchronous interface which the
device is gauranteed to output. I guess the relationship between the
clock and data (timing relationship) should be maintained as both of
them reach the receiver. The only thing I could think of that might
change this relationship is the ISI. My question is "If we neglect
ISI, is there another source of jitter that we need to consider.
If the answer is yes, then wouldn't that effect both clock and data
simultaneously and hence cancel out"..

Could you please explain...

Curious..

Saeen

>From: Scott McMorrow <scott@vasthorizons.com>
>Reply-To: Scott McMorrow <scott@vasthorizons.com>
>To: Todd Westerhoff <twester@hhnetwk.com>
>CC: dkhatri <dkhatri@micron.com>, si-list@silab.eng.sun.com
>Subject: Re: [SI-LIST] : Clock Jitter
>Date: Tue, 24 Apr 2001 15:54:05 -0700
>
>Whether to include clock jitter in Setup or Hold calculations depends upon
>the source of the data and the source of the clock for the transmitter and
>the receiver.
>
>Let Clock(N) be the Nth clock edge
>Let Clock(N+1) be the (N+1)th clock edge
>
>Whether a (cycle to cycle) jitter is included in Setup and Hold
>calculations
>is dependent upon whether or not
>
>case 1) Transmitter and receiver use clocks derived from the same external
>clock source. ( a.k.a. synchronous clocking)
> Data transmitted on Clock(N)
> Data received on Clock(N+1) for setup
> Data held against Clock(N)
> Setup requires jitter to be included in calculation.
> Hold does not require jitter to be included in calculation.
>
>case2) Source synchronous, Transmitter clock and data are created from
>same clock source. Receiver uses Clock received from transmitter.
> Data transmitted on Clock(N)
> Data Received on Clock(N) for setup
> Data held against Clock(N-1)
> Setup does not require jitter to be included in calculation.
> Hold requires jitter to be included in calculation.
>
>case3) Clock forwarded from one agent-1 to agent-2 (Some processor memory
>systems)
>Agent-1 receive clock is a delayed version of clock sent to agent-2
>Clock sent trom agent-1 to agent-2. Transmission from Agent-1 to Agent-2
>is the same
>as Source synchronous case. For transmission from Agent-2 to Agent-1:
> Data is transmitted on Clock(N) by Agent-2
> Data is received on Clock(N+1) by Agent-1 for setup
> Data is held against Clock(N) by Agent-1 for hold.
> Setup for Agent-1 to Agent-2 path does not require jitter to
>be included in calculation
> Setup for Agent-2 to Agent-1 path does require jitter to be
>included in calculation.
> Hold for Agent-1 to Agent-2 path does require jitter to be
>included in calculation.
> Hold for Agent-2 to Agent-1 path does not require jitter to be
>included in calculation.
>
>And as Dave Coleman pointed out, there are other sources of jitter that
>must be accounted
>for, also. Any jitter induced into a clock signal should be included in
>path timing calculations,
>as well as crosstalk, coupling, sso induced into the data path.
>
>Finally, if intermediate Phase Locked Loops are used in the clocking path,
>then jitter from
>these must also be accounted for. And, if clocks to devices on a bus are
>sourced by
>seperate PLL's , for example with cards interfacing to a bus, then the long
>term jitter, or
>multi-cycle jitter for these devices must be used.
>
>regards,
>
>scott
>
>
>--
>Scott McMorrow
>Principal Engineer
>SiQual, Signal Quality Engineering
>18735 SW Boones Ferry Road
>Tualatin, OR 97062-3090
>(503) 885-1231
>http://www.siqual.com
>
>
>Todd Westerhoff wrote:
>
> > Clock jitter normally does not apply to hold equations because both the
> > driver and receiver are referencing the same clock edge.
> >
> > Todd.
> >
> > -----Original Message-----
> > From: owner-si-list@silab.eng.sun.com
> > [mailto:owner-si-list@silab.eng.sun.com]On Behalf Of dkhatri
> > Sent: Tuesday, April 24, 2001 3:45 PM
> > To: si-list@silab.eng.sun.com
> > Subject: [SI-LIST] : Clock Jitter
> > Importance: Low
> >
> > Hi all,
> > I have a question regarding the Clock jitter term. whether we should be
> > using CLOCK JITTER term in the Hold Equations or not.Can any body please
> > explain me whether we should or should not use it and why?
> >
> > Thanks,
> > Dirgha Khatri
> > Simulation Engineer
> > Micron Technology
> >
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