Re: [SI-LIST] : Clock Jitter

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From: Carlos Moll (cmoll@cadence.com)
Date: Tue Apr 24 2001 - 13:58:27 PDT


Dirgha:

I would recommend you to browse
http://developer.intel.com/design/chipsets/designex/index.htm.

There you will find excellent sources with timing equations, diagrams, etc.
for correct flight time compensation and computation techniques related to
the validation setup and hold margins.

An example of such supporting document (oldie but still very useful) is for
the 440BX AGPset

Carlos Moll
Cadence Design Systems, Inc.

Order Number: 290634-001

At 01:45 PM 4/24/2001 -0600, dkhatri wrote:
>Hi all,
>I have a question regarding the Clock jitter term. whether we should be
>using CLOCK JITTER term in the Hold Equations or not.Can any body please
>explain me whether we should or should not use it and why?
>
>Thanks,
>Dirgha Khatri
>Simulation Engineer
>Micron Technology
>
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