Re: [SI-LIST] : some board layout issues

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From: Bernard Voss (bjvoss@vernonia.com)
Date: Tue Apr 17 2001 - 20:39:35 PDT


e,

  I would use the following alternative stackup to reduce the impedance
between all power delivery signals and their returns and avoid the impedance
discontinuities signals routed adjacent to split reference planes
experience:

 signal1
 gnd2
 signal3
 signal4
 gnd5
 power6
 power7
 gnd8
 signal9
 signal10
 gnd11
 signal12

   Power7 would be split to provide multiple, fully isolated from routing,
voltages, and the dielectric thickness between layers 6 and 7 would be
increased to meet the target finished thickness, (and yes, Of course I would
also have to show you how I would fit your 8 layer routing solution into a 6
layer low coupled routing solution but only if you insist.)

Bernard

e wrote:

> To all the experts, I would like to get some feedback on a couple of
> issues:
>
> Board dimension is about 4"X8"
> signal1
> gnd2
> signal3
> signal4
> power5
> signal6
> signal7
> power8
> signal9
> signal10
> gnd11
> signal12
>
> 1) With the stack up above, the plane power5 is used as reference for
> signal4 and signal6 (same is true or power8). To accommodate a
> different (third) voltage, a two square inch cut is made in power5. The
> cut is 50-100 mil. For signals (of different rise times 2-5 ns) on
> layers signal4 and signal 6 that cross that boundaries between the two
> voltage partitions on power5:
>
> a) Is it possible to to control the impedance, now that the
> reference plane is broken? How much of problem does this broken
> reference pose on controlling the impedance of that trace? Is it
> comparable to the discontinuity presented by a via as a trace changes
> layers? Will this broken reference cause significant reflections?
>
> b) To the concept of return current that normally follows that path
> of least inductance, which is the reference plane directly below or
> above the trace, this current will now seek a different path back to the
> driver, possibly through a cap to a ground plane and back to the
> source. Does this less than optimum return path necessarily increase
> radiation, because the loop area is now larger?
>
> 2) A fourth voltage is routed with 100-200 mil trace on signal3 and
> signal4 from a signal DC-DC supply to two adjacent pins on a
> board-to-board connector, where two independent paths are used for each
> pin, thereby forming a loop with an area of about one square inch. Does
> this loop add to radiation at the frequencies of interest for FCC
> compliance?
>
> Ellis
>
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--
Bernard Voss
Principal Interconnect Specialist
SiQual, Signal Quality Engineering
18735 SW Boones Ferry Road
Tualatin, OR  97062-3090
(503) 885-1231
http://www.siqual.com

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