RE: [SI-LIST] : Diff clocks length matching

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From: Larry Miller (ldmiller@rhapsodynetworks.com)
Date: Tue Apr 17 2001 - 19:35:47 PDT


Hi, Tom,
 
Well, I used a Tek 11801C for four years, and we are looking forward to a
CSA8000 with fins & fog lights. Additionally, we used (still do) a Tek 694C
with the Amherst jitter analysis software which in fact calibrates out the
scope jitter caused by trigger level uncertainty, one of two components (the
vertical one) of aperture jitter. The CSA8000 advertises a couple of
picoseconds of short term jitter, not femtoseconds. Factor of 1000 there....
 
I have never seen anything in the femtosecond area in any of these
instruments. For one thing, you cannot begin to see that on the screen at
the highest sweep rate on the 11801C. The 694C/Amherst combo gets such
numbers by mathematically mulching boucoup samples-- the scope only has a 10
G sample/sec (Gsps) maximum rating, if I read the front panel correctly on
the one we have. If I remember correctly, it has something on the order of 6
to 7 ps of residual absolute time base error.
 
To date, in my femtosecond-challenged locations, whenever we started talking
about fractional picoseconds we were talking about averages of large numbers
of samples to allow statistics to work for us.
 
Now, using your own example and ratcheting down to a realizable (by Maxim)
7.5 bits you open up your window from 15.9 ps (time is a strange unit for
phase, BTW, but I get the idea, or at least think I do, that you mean sample
time uncertainty) by 5.6568542494923801952067548968388 (as long as we are in
this realm, what the hey, let's have ALL the decimals) to 89.94 ps. Take it
down by the fact that this ADC only handles +/- 0.25 V signals-- that cuts
the slew rate by another factor of 4 by your method-- and that would mean
that 0.3 ps of board mismatch would be 0.08% of the ADC uncertainty.
Negligible, I think.
 
The aperture jitter in the Maxim spec sheet seems to mainly indicate that
they have a very high slew rate input amplifier (which they brag about) and
a fast sampler switch, which is swell. Note that this jitter number is
relative to the clock (which I surely cannot afford if it is this accurate
on a single sample basis). Even so, this spec is foot-noted (note 11) to
invoke a best-fit curve; oh, dang it, there is that averaging thing again!
(Don't get me wrong, this is a very impressive ADC by the specs.)
 
Now, the scopes referred to by you are 20 GHz to 50 GHz instruments, which
is in line with the number I said (31 GHz) your calculation implies. The
Maxim ADC is only 1.5 Gsps and the effective number of bits falls off a
cliff above that. You *could not use it* in the scopes mentioned, even the
694C. Why not?
 
0.3 ps resolution is not fast to me (0.3 ps absolute accuracy is another
matter entirely), and it is indeed necessary in the 50+ GHz arena, which I
think is where we ended up on this (see below), at least to us
skeptics--->"wow, you must be looking at really high frequency signals!".
 
....whole lotta specmanship goin' on... (sing in Jerry Lee Lewis mode).
 
Sorry about the planetary reference, I'm rather new here myself.
 
Larry Miller

-----Original Message-----
From: Dagostino, Tom [mailto:tom_dagostino@mentorg.com]
Sent: Tuesday, April 17, 2001 5:45 PM
To: 'Larry Miller'; Dagostino, Tom; 'Scott McMorrow'; cadpro2k@dacafe.com
Cc: Sainath Nimmagadda; Signal Integrity
Subject: RE: [SI-LIST] : Diff clocks length matching

Don't confuse bandwidth with phase. This is a phase error problem, making
sure all ADC's are sampling at the same phase of the input. 15.9 psec of
phase error of a 10 MHz is 1 LSB of a 10 Bit ADC.
 
Look at the Maxim Max108 1.5GS/sec ADC.
 
http://pdfserv.maxim-ic.com/arpdf/2092.pdf
<http://pdfserv.maxim-ic.com/arpdf/2092.pdf>
 
It is rated at 7.5 effective bits at its Nyquist of 750 MHz. See page 5 and
you will see it has an aperture jitter of 0.5 psec typical.
 
0.3 psec may seem fast to you but Tek and -hp-/Agilent have been making
oscilloscope time bases with femtosecond resolution for years. You have to
be able to do this to digitize 50 GHz signals to any kind of accuracy. See
http://www.tek.com/Measurement/cgi-bin/framed.pl?Document=/Measurement/scope
s/index/prodindex_sampling.html
<http://www.tek.com/Measurement/cgi-bin/framed.pl?Document=/Measurement/scop
es/index/prodindex_sampling.html&FrameSet=oscilloscopes>
&FrameSet=oscilloscopes
 
 
I am on earth, where are you?

Tom Dagostino
IBIS and Tau Modeling Manager
SDD
Mentor Graphics Corp.
503-685-1613
tom_dagostino@mentor.com

-----Original Message-----
From: Larry Miller [mailto:ldmiller@rhapsodynetworks.com]
Sent: Tuesday, April 17, 2001 5:05 PM
To: 'Dagostino, Tom'; 'Scott McMorrow'; cadpro2k@dacafe.com
Cc: Sainath Nimmagadda; Signal Integrity
Subject: RE: [SI-LIST] : Diff clocks length matching

>>Do the same exercise at 100 MHz input signal and you would get 1.59 psec.
That would be the
>>total budget for timing errors. Of that, how much do you want the board
to contribute?
 
---Show me an ADC that has timing errors down in this region and I will go
along with 0.3 ps making a difference somehow.
What your time resolution calculation implies is a video system bandwidth of
62.893081761 * 0.5 GHz.
 
Nahhhhh........ Come back to Planet Earth.
 
Fine time granularity implies high bandwidth and vice-versa.
 
Larry Miller

-----Original Message-----
From: Dagostino, Tom [mailto:tom_dagostino@mentorg.com]
Sent: Thursday, April 12, 2001 11:24 AM
To: 'Scott McMorrow'; cadpro2k@dacafe.com
Cc: Sainath Nimmagadda; Signal Integrity
Subject: RE: [SI-LIST] : Diff clocks length matching

There are very common applications where much tighter timing than you would
expect is required.
 For example digitizing video signals presents some interesting timing
constraints. Let's assume
there are the R, G and B signals getting to 3 10 Bit ADCs at the same time.
Each of these
converters will run at 20 MS/sec. Let's assume the worst case, a 10 MHz
sine wave input of 1 Volt
amplitude. We want to digitize all the components at the same time. In
this case the same time
will be defined as there will be no more than 1/2 bit in amplitude
difference between the three
signals due to time differences in sampling.
 
The math is straight forward.
 
signal = 1sin2Pi10^7
the slew rate is the derivative
 
2Pi10^^7cos2Pi10^7
 
evaluated at the max slope
 
2Pi10^7 V per sec
 
The amount of time it takes for this slew rate to travel 1/2 LSB of the ADC
is
 
1mV/2Pi10^7
 
or about 15.9 psec
 
Do the same exercise at 100 MHz input signal and you would get 1.59 psec.
That would be the
total budget for timing errors. Of that, how much do you want the board to
contribute?
 

Tom Dagostino
IBIS and Tau Modeling Manager
SDD
Mentor Graphics Corp.
503-685-1613
tom_dagostino@mentor.com

-----Original Message-----
From: Scott McMorrow [mailto:scott@vasthorizons.com]
Sent: Wednesday, April 11, 2001 3:36 PM
To: cadpro2k@dacafe.com
Cc: Sainath Nimmagadda; Signal Integrity
Subject: Re: [SI-LIST] : Diff clocks length matching

There's no magic here. As Larry Miller correctly points out, 1 mil is
only 300fs in delay. A state of the art 10Gbps driver can launch a
25ps edge, due to impedance mismatches and loss effects you are
lucky to be able to keep the edge rate across a board to less than
50 ps. A 1 mil differential skew (300fs) is 0.6% of the duration of the
edge. This is an insignificant skew relative to other effects on the board
and in the system.

I'd be generally very happy to have differential skews matched to
within 5% of the edge rate for most systems.

10Gbps - about 10 mils
3.2 Gbps - about 20 mils
2 Gbps - about 25 mils
1 Gbps - about 50 mils
622 Mbps - about 100 mils

Then, on a board with 100's of differential pairs, if the layout misses
the mark by a factor of 2:1 on each of the 3 boards in the total end to
end path (driver --- backplane --- receiver), there is still enough
headroom to still work.

regards,

scott
  

-- 
Scott McMorrow 
Principal Engineer 
SiQual, Signal Quality Engineering 
18735 SW Boones Ferry Road 
Tualatin, OR  97062-3090 
(503) 885-1231 
http://www.siqual.com <http://www.siqual.com>  
  
  

cadpro2k@dacafe.com wrote:

---------Included Message----------

>From: "Sainath Nimmagadda" <sainath@lsil.com>

>Subject: Re: [SI-LIST] : Diff clocks length matching

>Don't you think we keep adding new laws to physics as we push the

>envelope. I believe that pushing the envelope happens

>when somebody *insists* on something. Don't you agree with me?

>

As Lee Ritchey would say, and I like to quote as often as possible "Show

me the data." Let's see, if it takes me 3-4 days to layout a certain

"theoretical" geometry on a pcb (say 2 64 bit busses running 4-6" on a

board, at +/-.001" tolerance) because it's thought to be required, and a

simulator costs $10K, what are my options? Might I be able to use the

routing again, or might I use the simulator again? Humm... Was the

insistance based on factual data?

Yep... "Show me the data."

:) Mitch

_____________________________________________________________

Tired of limited space on Yahoo and Hotmail?

Free 100 Meg email account available at http://www.dacafe.com <http://www.dacafe.com>

_____

Hey Larry,

Don't you think we keep adding new laws to physics as we push the envelope. I believe that pushing the envelope happens when somebody *insists* on something. Don't you agree with me?

Sainath

Larry Miller wrote:

...and when I was in the professional audio business (Ampex in its Days of Glory) I had guys tell me they could hear 30 kHz.

0.002" = 0.3 picoseconds with your own calculator (which I use frequently, thanks!). I don't believe you can measure that in a video system, much less see any effects from it. How much of a pixel is that in any analog system, let alone a digital one that is clocked?

Rich Hollywood nuts may demand it and even pay for it, but it doesn't mean it is necessary. Personally, I stand by the laws of physics, not psychics.

Regards,

Larry Miller

-----Original Message----- From: Doug Brooks [ mailto:doug@eskimo.com <mailto:doug@eskimo.com> ] Sent: Wednesday, April 11, 2001 8:55 AM To: Larry Miller; si-list@silab.eng.sun.com Subject: RE: [SI-LIST] : Diff clocks length matching

Actually we had a customer once that wanted a large number of bus's ALL matched to within a spec like that. The bus's were for a matrix of video signals. The argument was that you couldn't measure the differences in time, but you could SEE it on the display matrix. It cost them a lot in time and in layers to get that, but they insisted it was important.

Doug Brooks

At 07:06 PM 4/10/01 -0700, you wrote: >2 mils (0.002") is a ridiculous spec unless you are operating at 200 GHz. > >0.1" is close enough for 2 GHz at anything like normal propagation >velocities (in the vicinity of 5.6" per ns). > >Search on polar.com to get tutorials on differential pairs or search on Eric >Bogatin or just search on differential pairs. National Semi has quite a >tutorial in their LVDS literature, You have the right idea, but you are not

>looking at the correct parameters. When you find it, show it to whomever >asked for 0.002" phase matching! > >Larry Miller > > >-----Original Message----- >From: AA [ mailto:alokbya@yahoo.com <mailto:alokbya@yahoo.com> ] >Sent: Tuesday, April 10, 2001 6:34 PM >To: Todd Westerhoff; Kim Helliwell; Anthony Davidson >Cc: 'Dunbar, Tony'; si-list@silab.eng.sun.com >Subject: [SI-LIST] : Diff clocks length matching > > > >This questions concern routing fast differential >clocks pairs from a clock driver to chipset. The pair >is series terminated and the termination resistor set >near the clock driver. I learned that the pair needs >to be length matched to within 2 mills. >- First questions is which trace do we need to length >match is the one between the chipset and the >termination resistor or is the entire trace length >(between clock drive and chipset) and why? >- Second it was suggested that the spacing between >the pair should be set to 12 mills ( a multiplier of >the distance to the GND plane). This was based on >simulation. How does one come up with the ideal >spacing and what factors impact this? I thought >separating the differential pair to far would be >counter intuitive since it impacts their common mode >noise rejections? But then getting them to close may >present cross talk issues!! > >Your input is very much appreciating it. > >Adan > >--- Todd Westerhoff <twester@hhnetwk.com> wrote: > > "So I think the accuracy issue is illusory." > > > > I like that. Truer words were never typed ;-). > > > > The argument of IBIS vs. HSPICE is a recurring one. > > While I think there is > > a lot of substance to it, I also think the whole > > issue is incredibly > > over-hyped. We're talking about analog analysis > > after all; error is > > inherent. It *cannot* be avoided, and therefore, > > the real issue is keeping > > the "accuracy" of the analysis in perspective. It > > doesn't do you much good > > to go after the last 1% of accuracy with your > > simulator algorithms when your > > models are only +/- 5% to start with. However, > > understanding how models > > correlate back to reality is difficult, at best. > > > > The real problem, I suspect, is that "HSPICE is more > > accurate than IBIS" > > makes for a good sound bite, and "you really have to > > understand what you're > > modeling, and how" doesn't. After all, modeling > > isn't fun. Right? > > > > I think there are lots of places where the "SPICE or > > not to SPICE" arguments > > have merit. But I've also spent enough time > > trudging through models and > > data where the most basic things were wrong, to know > > that until we have a > > firm, common foundation, arguing about details > > doesn't make much sense. And > > guess what - we're not there yet! > > > > The disguised blessing with IBIS is that by > > standardizing the model format, > > it made it easier for users to find problems with > > the models they use, and > > to correlate those models against test load > > conditions and datasheets. > > HSPICE models, in contrast, are often encrypted and > > have unique interface > > requirements (control pins, voltages and slew > > rates). Bottom line, an IBIS > > model is a lot easier to check and use than a > > corresponding HSPICE model. > > > > If you're analyzing phenomena that only a SPICE > > model can represent, then > > there's no choice. But I'd use IBIS as the "first > > line of defense" in any > > situation where I could, and only back that analysis > > up with SPICE when > > needed. > > > > My $0.01 (only worth half of a typical opinion). > > > > Todd. > > > > > > > > -----Original Message----- > > From: owner-si-list@silab.eng.sun.com > > [ mailto:owner-si-list@silab.eng.sun.com <mailto:owner-si-list@silab.eng.sun.com> ]On Behalf Of > > Kim Helliwell > > Sent: Tuesday, April 10, 2001 4:19 PM > > To: Anthony Davidson > > Cc: 'Dunbar, Tony'; 'si-list@silab.eng.sun.com' > > Subject: Re: [SI-LIST] : Hspice: Windows vs Unix > > > > > > Actually, accuracy isn't really the issue, or at > > least not in the > > sense your management probably means it, Anthony. > > > > SpecctraQuest uses a spice-like simulator, TLSIM, to > > do the work. > > This simulator is a derivative of SPICE (I don't > > know which flavor), > > and therefore has all the usual accuracy plusses and > > minuses of > > any SPICE, including HSPICE. > > > > In addition, TLSIM has a coupled transmission line > > model, and the > > diode and transistor models have been removed, and > > the whole simulator > > has been optimized for the problem it's intended to > > solve. > > > > The question of whether TLSIM's coupled transmission > > line is more > > or less accurate than HSPICE's W-element is one of > > the issues, and > > I cannot quantify it, except that I've never seen > > any reason to > > distrust either one. From that I conclude that they > > are probably > > equally good. > > > > The real issue you face is the classical conundrum > > of SPICE: that accuracy > > of results depends on accuracy of the models. So > > the issue is: what's > > more accurate: the manufacturer's original BSIM > > models of their buffers, > > or their IBIS models? The answer is obvious, since > > presumably the IBIS > > models derive from the SPICE buffer models (almost > > no one creates IBIS > > models from lab measurements, you see). But IBIS > > models can be very > > close to the buffer models they derive from, and > > it's possible to lose > > very little accuracy in using them. Whereas you > > might not be able to even > > get the buffer model. And then you are forced to > > use HSPICE's IBIS buffer > > model, at which point the accuracy of the two is on > > an even footing, and > > it's *MUCH* harder to use HSPICE in this way than to > > use SpecctraQuest. > > > > So I think the accuracy issue is illusory. If your > > management has enough > > confidence in you, you have a chance to educate > > him/her/them as to the > > realities of the situation. > > > > Personally, I've used SpecctraQuest a lot in the > > last 2 years, and HSPICE > > only > > occasionally. I use it for 2 things: as a field > > solver when the problem is > > not easily expressible in terms that SQ understands, > > and perhaps to create > > an IBIS model when the vendor provides an HSPICE > > buffer model but no IBIS > > model. > > A third possibility is when IBIS doesn't accommodate > > a particular type of > > buffer. > > > > So I think Tony has a good question, and it's also > > not clear to me what > > value-added HSPICE provides in your management's > > view. There is some, but > > perhaps not where they are looking for it. > > > > Kim > > > > Anthony Davidson wrote: > > > > > > Perhaps that's where I have seen your name. > > > > > > I am a new user to Hspice, and SpecctraQuest for > > that matter. But the > > > opinions of my team leaders is that the tools that > > are able to do analysis > > > on complete boards and board-to-board > > interconnects are not as accurate as > > > Hspice. And Hspice is more accurate, however, the > > analysis of complex > > (many > > > connections) boards is very difficult. > > > > > > Note that the "less accurate" and "more accurate" > > statements are the > > > opinions of others and not necessarily > > quantifiable. > > > > > > Anthony Davidson > > > > > > -----Original Message----- > > > From: Dunbar, Tony > > [ mailto:tony_dunbar@mentorg.com <mailto:tony_dunbar@mentorg.com> ] > > > Sent: Tuesday, April 10, 2001 11:18 AM > > > To: 'Anthony Davidson' > > > Subject: RE: [SI-LIST] : Hspice: Windows vs Unix > > > > > > Hi Anthony, > > > > > > No, neither Nortel, nor Univ of Western Ontario. > > Maybe you've seen my name > > > on the list or something. > > > > > > The reasoning behind my question is that the > > platform on which you're > > > running the other tools might give some pointers > > to the H-SPICE platform > > > choice. Actually, since you're going with > > SPECCTRAQuest, I don't really > > see > > > the need for H-SPICE for the so-called "fewer, > > critical nets". On these > > > nets, what is it you're looking for SPICE to > > provide that SPECCTRAQuest > > > can't? I'm not saying there is never room for > > co-existance, >=== message truncated === > > >__________________________________________________ >Do You Yahoo!? >Get email at your own domain with Yahoo! Mail. > http://personal.mail.yahoo.com/ <http://personal.mail.yahoo.com/> > >**** To unsubscribe from si-list or si-list-digest: send e-mail to >majordomo@silab.eng.sun.com. In the BODY of message put: UNSUBSCRIBE >si-list or UNSUBSCRIBE si-list-digest, for more help, put HELP. >si-list archives are accessible at http://www.qsl.net/wb6tpu <http://www.qsl.net/wb6tpu> >**** > >**** To unsubscribe from si-list or si-list-digest: send e-mail to >majordomo@silab.eng.sun.com. In the BODY of message put: UNSUBSCRIBE >si-list or UNSUBSCRIBE si-list-digest, for more help, put HELP. >si-list archives are accessible at http://www.qsl.net/wb6tpu <http://www.qsl.net/wb6tpu> >****

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