RE: [SI-LIST] : How to model effect of vias on nearby traces?

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From: Larry Miller (ldmiller@rhapsodynetworks.com)
Date: Thu Mar 22 2001 - 13:41:43 PST


I have seen some high speed connector TDR plots where traces are routed
through pin fields on back/midplanes. This is similar to passing near a via,
even worse I would think. I have also done TDR's on our own boards.

The effect seems to be very small (a few % of 50 ohms) and of short duration
in time, which of course corresponds to very high frequencies (10's of GHz).

One view.

Larry Miller

-----Original Message-----
From: Patel, Bhavesh [mailto:bpatel@cyras.com]
Sent: Wednesday, March 21, 2001 8:06 PM
To: SI_LIST (E-mail)
Subject: [SI-LIST] : How to model effect of vias on nearby traces?

Hi! I wanted to know how do I simulate the effect on the impedance..
reflection on a trace/signal when it is very close to a via. It does not go
thru the via but passes very close to it. Can I model this in HSPICE? And if
yes how/
Thanks in advance
Bhavesh

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