RE: [SI-LIST] : Layout of Bypass Cap

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From: S. Weir (weirsp@atdial.net)
Date: Sat Mar 17 2001 - 15:21:57 PST


Andrew,

Inductance is the worst enemy. Positioning of vias and then the planes in
the stack-up for minimum inductance needs to be a high priority.

Regards,

Steve.
At 02:29 PM 3/16/01 -0500, you wrote:
>"'si-list'" <si-list@silab.eng.sun.com>

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