RE: [SI-LIST] : Layout of Bypass Cap

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From: Ingraham, Andrew (Andrew.Ingraham@compaq.com)
Date: Fri Mar 16 2001 - 11:29:24 PST


> In any case your goal is to minimize the inductance between the cap and
> the
> IC,
 
I would say the preferred goal is to minimize the inductance between the IC
and the plane!

The plane is usually your best high frequency bypass capacitance, though
small. The discrete cap fills in when the local plane capacitance in that
area starts to be depleted.

Do not make longer traces to get a direct connection from the IC pin to the
cap. But not everyone agrees.

Andy

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