From: Thomas Jackson ([email protected])
Date: Fri Mar 16 2001 - 11:14:02 PST
Assuming there are large, thin power-ground pairs to make good parallel
plate capacitors, I would put the capacitors anywhere. But, make sure that
all the capacitor and component power and ground pins are connected to their
respective planes with the shortest connection paths and the smallest
current loop areas possible.
Thomas L. Jackson, P.E.
Staff VLSI Design Engineer
Network Access Development
Systems Solutions Group
FUJITSU MICROELECTRONICS, INC.
3545 North First Street
San Jose, CA 95134-1804
telephone: (408) 922-9574
facsimile: (408) 922-9618
From: Kai Siang [mailto:[email protected]]
Sent: Friday, March 16, 2001 10:17 AM
To: [email protected]
Subject: [SI-LIST] : Layout of Bypass Cap
A question on bypass caps. How do I place bypass caps ? Do i connect a fat
short trace from the pad of surface mount cap to the supply pin of the IC
and then punch a via to the power plane near this pin ? Or can i place the
cap physically near the supply pin and just punch a via into the power plane
? Which approach is better ?
**** To unsubscribe from si-list or si-list-digest: send e-mail to
[email protected] In the BODY of message put: UNSUBSCRIBE
si-list or UNSUBSCRIBE si-list-digest, for more help, put HELP.
si-list archives are accessible at http://www.qsl.net/wb6tpu
This archive was generated by hypermail 2b29 : Thu Jun 21 2001 - 10:11:14 PDT