[SI-LIST] : Simulation of address and data bus

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From: Patel, Bhavesh (bpatel@cyras.com)
Date: Wed Mar 07 2001 - 20:04:47 PST


Hi! I had a question regarding simulations of address and data bus at
particular frequencies. Say, if the chip is being clocked at 166Mhz do we do
simulations of the address and data bus to the chip at 166Mhz or do we do it
at half the clock frequency.? What would give an approx real world scenario,
simulation at the clock frequency or half the clock frequency?

Thanks
Bhavesh

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