Re: [SI-LIST] : Why all reset signals are active low

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From: Senthil.Selvam@smartm.com
Date: Mon Mar 05 2001 - 21:54:41 PST


Selvaraj,
One is when an TTL input is unconnected/disconnected there is no false CS.
There is no false RESET when a noise spike is coupled due to external
distubances.

Also the current required to keep a logic input high is less than keeping it
low. Hence
lower power dissipation under normal operation. ie the duration CS asserted
condition
is much less than not asserted condition.
Also think about the decoding circuit glitches.

Senthil Selvam.V
Sr Design Engineer
FORCE Computers India Pvt Ltd
Bangalore..

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