[SI-LIST] : queries: HSTL standard

About this list Date view Thread view Subject view Author view

From: manoj-kumar.sharma@st.com
Date: Mon Mar 05 2001 - 03:32:56 PST


Hi All,

I have few queries regarding the Differential input parametrics given in
HSTL JEDEC standard.

According to the standard.

Differential input dc logic levels

Symbol Parameter Min. Max.
------ --------- --- ----
Vin(dc) DC input signal voltage -0.30 VddQ+0.30
Vdif(dc) DC differential input voltage 0.20 VddQ+0.60
Vcm(dc) DC common mode input voltage 0.68 0.90

Note
> VddQ is the output supply voltage =1.5V for HSTL
> Vref=0.75 nominal, 0.68 min., 0.90 max. for HSTL
> Vdif(dc) specifies the minimum input differential voltage(Vtr-Vcp)
required for switching where Vtr is the true input level and Vcp is the
complement input level.
> Vcm(dc) specifies the maximum allowable range of Vtr-((Vtr-Vcp)/2)

My questions are

1. If I design a differential amplifier, how i check it for Vdif. I mean
under this condition (checking for Vdif) what type of input i should give
to a diff. amp. Is both Vref input and other input are varying in this
case. What type of output should i get.

2. What is the significance of Vcm. Is it the same as that of common mode
range of a differential amplifier (the range b/w diff. amp. works
linearly ie. transistors are in saturation region).
If not, then how it is taken into consideration while designing.
How is it measured?

Thanks
Manoj

**** To unsubscribe from si-list or si-list-digest: send e-mail to
majordomo@silab.eng.sun.com. In the BODY of message put: UNSUBSCRIBE
si-list or UNSUBSCRIBE si-list-digest, for more help, put HELP.
si-list archives are accessible at http://www.qsl.net/wb6tpu
****


About this list Date view Thread view Subject view Author view

This archive was generated by hypermail 2b29 : Thu Jun 21 2001 - 10:11:07 PDT