From: Ron Miller ([email protected])
Date: Sat Mar 03 2001 - 12:51:16 PST
You make a good point. I like the idea of termination of only the high frequency
signals without providing a path for the lower frequency garbage from inverter
power supplys and such.
Thanks for the suggestion.
From: [email protected] [mailto:[email protected]]
Sent: Saturday, March 03, 2001 12:41 PM
To: [email protected]; [email protected]; [email protected]; [email protected]
Subject: Re: [SI-LIST] : Combined single-ended/differential termination pa ckage?
Ron, I believe I've read that common mode noise on the input of PECL devices
(and maybe some others) can produce jitter on the output. I've also noted
that when people call out a capacitor for providing a common mode termination
(when the differential termination is two seriesed 50 ohm resistors,
capacitor to ground at the center tap) the value is usually .01ufd. It seems
like the high frequency components are the primary offenders, due to reduced
common mode rejection of the input stage of the receiver, as well as
unbalances in the two sides of the driver. I believe it would be a
reasonable compromise to use a 30-70pf capacitor in order to provide common
mode termination just at the higher end of the spectrum. What do you think?
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