[SI-LIST] : Methods to introduce noise in power planes

From: [email protected]
Date: Mon Apr 16 2001 - 07:55:51 PDT

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Hello All.
I have a test board, which has clock drivers and SERDES on it. I want to
observe the effect of power supply noise on the performance of SERDES
and the jitter on the clock driver output. For that, I would like to
introduce noise in the power planes. Can any body suggest how I could do
that?

Thanks and regards
Sunil Kumar
Centre for Development of Telematics (C-DOT)
71/1 Millers Road
Bangalore
INDIA

email: [email protected]
[email protected]
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• Next message: Degerstrom, Michael J.: "RE: [SI-LIST] : Attenuation and Delay on a PCB Trance"
• Previous message: Javin Olson: "[SI-LIST] : 1/2 oz copper on high speed boards"
• Next in thread: Ray Anderson: "Re: [SI-LIST] : Methods to introduce noise in power planes"
• Maybe reply: Ray Anderson: "Re: [SI-LIST] : Methods to introduce noise in power planes"
• Maybe reply: Kai Keskinen: "RE: [SI-LIST] : Methods to introduce noise in power planes"

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