[SI-LIST] : controller<=>memory non-monotonic issues

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From: Su Ming TAI ([email protected])
Date: Mon Mar 12 2001 - 21:32:29 PST


Dear SI gurus,

There are some issues concerning the controller<=>memory that some of you
may be able to help me with.
The design is a controller connected to two SO-DIMMs.
SO-DIMM1 is a 256MB and SO-DIMM2 is a 64MB. Clock is rated at 80 MHz and
max delay is 6ns.
According to our simulator, the are some non-monotonic on the address and
some of the control lines.
In your opinion, will the non-monotonic effects compromise the SI of the
board especially the control lines?

Thank you.

Regards,
SuMing TAI

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     Su Ming, TAI ($BBW(B $B;WL@!K(B

     ULTIMATE TECHNOLOGIES INC
     Shindenchou 1462-6F, Nagano City,
     Nagano Prefecture, JAPAN
     380-0835

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