Date: 07 May 92 19:02:42 Z From: KC6HPN@WB6YMH From: KC6HPN @ WB6YMH.#SOCA.CA TAPR FULL-DUPLEX (NEW) 9600 BAUD MODEM MODS BY KC6HPN (PART 1 OF 4) APRIL 23, 1992 These modifications correct several problems that can seriously degrade the performance of the new (not the K9NG) TAPR 9600 baud modem. They have significantly improved the usability of my modem. DCD (Data Carrier Detect) operation, in particular, went from intermittent to rock solid. All mods have been implemented on my (first production run) TAPR modem board, which is installed in a PK232MBX. I welcome any comments and will answer any questions on these modifications. Just drop a message in my BBS mailbox, KC6HPN @ WB6YMH.#SOCAL.CA.USA.NA. 73, Brian, KC6HPN MODULATOR SIDE MODIFICATION: 1. HOW: Remove capacitor C5 (0.001 uf). WHY: Op-amps tend to oscillate when driving a non-isolated capacitive load to ground. U22B, a TLC274 op-amp is driving C5 to ground through C31. U22B may oscillate at approximately 400 kHz due to the pole created by C5. This oscillation will be superimposed on the modulating waveform. To diagnose this problem, examine the eye pattern at TXA. The eye should be sharp, if it is fuzzy, the op-amp is oscillating. NOTE: C5 normally functions as part of an RFI filter to prevent noise from entering the modem via the TXA line. I have found that in my situation C2 and R2 alone are sufficient. Those with RFI problems should not remove C5 Instead, place a 220 to 470 ohm resistor in series with C31 to provide resistive isolation from C5. This resistor will cause a slight loss in output drive. If necessary, you may increase output drive by changing R39 to 300 k. NOTE: The first TAPR kits used a TL084 op-amp for U22 which may be slightly more resistant to oscillation. However, the TL084 may still oscillate. DEMODULATOR SIDE MODIFICATION: 1. HOW: Change U4 from a TL084 to a TLC274 op-amp. Replace D2 (1N4148) with a germanium diode (Bvr > 15 volts) or if not available with a 1N3600 silicon diode. WHY: Noise margin. The data slicer output is extremely dirty. An increase in noise margin represents improved bit recovery performance. The TLC274 can pull its output nearly to ground, the TL084 cannot. This becomes important in U4A, where the op-amp is used as a schmitt-trigger comparator (data slicer). The op-amp output drives a digital input to ground through diode D2. D2, a 1N4148, adds 0.9 volts offset from ground, and a TL084 will add from 0.5 to 0.8 volts to this offset. Since a 74HCxx series part must see less than 1.4 volts (VCC=5.0 v) to sense a logic 0, the resulting noise margin may be as low as 1.4-(0.8+0.9)= -0.3 volts. This will cause bit recovery errors and intermittent dropout of DCD (i.e. many retries) With the TLC274 and 1N3600, noise margin is 1.4-(0.05+0.6)= 0.75 volts - much better-. Germanium diodes, now somewhat rare, add only 0.35 volts offset and will boost noise margin even further to about 1.0 volts. A trade off is that the TL084 slew rate is twice as fast as the TLC274, making it a faster comparator. However, increased noise margin seems to be the critical item in my modem. CONTINUED IN PART 2 OF 4 ... Date: 07 May 92 02:44:24 Z From: KC6HPN@WB6YMH From: KC6HPN @ WB6YMH.#SOCA.CA TAPR FULL-DUPLEX (NEW) 9600 BAUD MODEM MODS BY KC6HPN (PART 2 OF 4) 2. HOW: Remove capacitor C24 (330 pf) and replace resistor R34 (2.2 k) with a wire (zero ohm) jumper -BUT ONLY IF YOU PUT IN MOD#3 - WHY: Capacitance and series resistance are the kiss of death to digital circuits. Unless U19F is a schmitt-triggered gate, such as the 74HC14, (which it is not), its output will glitch due to the slow risetime of the input waveform. Since U19F is in the data path, this will cause an increase in bit errors, even when the modem is receiving a strong, well formed signal. Ironically, the RC circuit formed by R34 and C24 may have been intended to filter out glitches from the bit recovery circuit (U7B, U11D) which has problems of its own (see mod#3). Or it may have been intended to solve a critical race condition by providing an RC delay (never use an RC for this...use a flip-flop instead). In the case of my modem, removing this circuit once mod#3 was made improved performance. 3. Okay, the easy part is over. This mod is the most critical and the most difficult. I'm also going to do "WHY" first this time, and "HOW" later. WHY: It is very, very necessary to add a double-buffering circuit directly after the data slicer (U4A, D2). A double buffer circuit consists of two flip-flops connected in SERIES and operated off of the same clock (fig.1). Its purpose is to synchronize external, asynchronous, signals to an internal clock without causing glitches. +5 v _ | D o------------------ | | \ | 10K / | 74HC74 Dual D Flip-Flop \ | / | | | ---------------------------o o--- |10 |4 | | | ----o---- ----o---- | |14 | 12 | PR | 9 2 | PR | 5 | VCC |0.047 uf A -------| D Q |--------| D Q |---------- B --- Slicer 11 | | 8 3 | | 6 | Buffered --- data in ---|>CLK QN|- ---|>CLK QN|- | data out GND | | | CL | | | CL | | |7 | | ----o---- | ----o---- | | | | |13 | |1 | E o--- 16x | -----------------o---------- | clock in | | --- C ---------------------- - Figure 1: DOUBLE BUFFER CIRCUIT CONTINUED IN PART 3 OF 4 ... Date: 07 May 92 19:59:18 Z From: KC6HPN@WB6YMH From: KC6HPN @ WB6YMH.#SOCA.CA TAPR FULL-DUPLEX (NEW) 9600 BAUD MODEM MODS BY KC6HPN (PART 3 OF 4) If the input signal to a flip-flop is in transition when the flip-flop is clocked, the flip-flop will briefly become metastable. That is, its output will hover between logic 0 and logic 1. In a short period, the flip-flop will resolve the metastable state and settle to a 1 or a 0. Two identical flip- flops connected to in PARALLEL to the same asynchronous input (as are U7B and U16) may not only produce glitches on their outputs, but will often settle to DIFFERENT logic states. Ooops! Half the modem thinks it sees the bit, half doesn't. This causes bit errors and faulty DCD. What the double-buffer does is this: 1. On the first clock edge, the first flip-flop clocks in the asynchronous data and resolves the metastable state. 2. On the second clock, the second flip-flop clocks in the settled data and provides a stable, glitch-free output. Propagation delay and setup and hold time requirements prevent the two flip-flops from clocking the glitchy data straight through, even though they are using the same clock edge. A deglitched, synchronous output is then passed to U16 for DCD and bit clock generation, and to U7B for bit recovery. Glitches formerly generated in U7B by metastability and passed to U19F through U11D are eliminated, removing the need for a (bad) glitch filter formed by R34 and C24. This circuit improved both DCD reliability and data recovery considerably on my modem. If your DCD indicator (on the modem) flickers even during a strong signal and you get many retries, this circuit will help. HOW: The general method is to construct a circuit assembly using an IC socket and mount the assembly "dead bug" style (upside-down) in the vacant U6 space. If you are using the optional internal clock generator and U6 is present, use any other convenient location. Once assembled and connected, the assembly is secured to the modem PC board by double-backed tape. (A) Obtain a 14-pin PC mount IC socket, preferably with an integral VCC decoupling capacitor, such as those made by AUGAT. Turn the socket over. Using fine insulated wire or resistor lead stubs, etc., construct the assembly as follows: I. Wire pins 1, 4, 10, and 13 together II. Wire pins 3 and 11 together III. Wire pins 2 and 9 together IV. Solder a 10k resistor between pins 1 and 14 V. If you are not using a decoupled socket, solder a 0.047 uf capacitor between pins 14 and 7 (B) Once the assembly is completed, place it to one side and examine the modem board. Using a soldering iron and tweezers, lift the non-banded end of diode D2 clear of its mounting hole. Next, using the same procedure, lift the end of R19 nearest to U5, the 7805 volt hanging ends of D2 and R19 together so that they touch. (C) Using thin, flexible wire, connect point A (pin 12) on the double buffer assembly to the joined ends of D2 and R19. Secure with solder (D) Using thin, flexible wire, connect point B (pin 5) on the double buffer assembly to the mounting hole vacated by R19. The area around the empty R19 hole is crowded, so solder carefully. CONTINUED IN PART 4 OF 4 ... Date: 07 May 92 19:03:28 Z From: KC6HPN@WB6YMH From: KC6HPN @ WB6YMH.#SOCA.CA TAPR FULL-DUPLEX (NEW) 9600 BAUD MODEM MODS BY KC6HPN (PART 4 OF 4) (E) Solder one end of a thin, flexible wire to U18, pin 11 on the back side of the modem board. Bring the end of the wire up and around to the top of the board, routing it alongside U18. Connect the wire to point C (pin 11) on the double buffer assembly. (F) Next, connect a wire to point E (pin 7), ground, of the double buffer assembly. Solder the other end of the wire to the center pin of U5, the 7805 voltage regulator. (G) Connect a wire to point D (pin 14), +5 volts, of the double buffer assembly. Solder the other end of the wire to the pin of U5 furthest from the modem PC board edge. (H) Carefully turn the assembly upright and insert a 74HC74 dual D flip-flop IC into the socket. Make sure the notch on the IC is on the same side as the notch on the socket. (I) Apply a thin strip of double-backed tape to the IC, invert the IC and assembly and stick it to the modem PC board in the unused U6 location. (J) Carefully power up the TNC and check for normal operation. HINTS: Use heat shrink tubing wherever possible to minimize exposed connections. Carefully premeasure all wire lengths before soldering. Wires to the assembly should be long enough to allow access to the IC, for insertion and removal, but no longer. - END OF TAPR MODEM MODS FILE -