module freqcnt_pi
(
	clk_10m,led1,led2,
	tdc_5m,tdc_10m,
	tdc2_start,tdc2_stop1, tdc2_stop2,
	tdc1_start, tdc1_stop,
	gate
);
output led1, led2;
output tdc_5m, tdc_10m;
output tdc2_start, tdc2_stop1, tdc2_stop2;
output tdc1_start, tdc1_stop;

input clk_10m;
input gate;
wire clk_int; 
wire clk;


reg [31:0] cnt;

always @(posedge clk) cnt <= cnt+1;

assign clk = clk_10m;

assign led2 = cnt[21]; 

assign tdc_5m = cnt[0];
assign tdc_10m = clk_10m;

reg [31:0] shift_reg;
always @(posedge clk) 
begin
	shift_reg[31:0] <= {shift_reg[30:0], gate};
end

assign tdc2_start = shift_reg[5];
assign tdc2_stop1 = shift_reg[6];
assign tdc2_stop2 = shift_reg[10];

assign tdc1_start = tdc2_start;
assign tdc1_stop = tdc2_stop1;

endmodule